1. Technical Field of the Invention
The present invention relates to secure integrated circuits and, in particular, to microcircuits with memory that is protected by both hardware and software.
2. Description of Related Art
In today's emerging area of electronic commerce, security of data that is stored in a semiconductor memory is a burgeoning issue with which authorized owners of such data must contend. In general, authorized access to electronic data is governed by hardware and software verification schemes involving passwords, personal identification numbers and the like. To further reduce the probability of successful unauthorized access to data, component manufacturers have also resorted to such techniques as data encryption. However, there are many applications wherein security concerns remain high enough that additional security mechanisms may be warranted.
A reliable, efficacious and economical solution to enhanced data security is to provide a combination of physical barriers wherein an intruder must grapple with successively overcoming such barriers. Although each physical barrier may itself be rather simple, it can be appreciated that a combination thereof may be a powerful solution wherein an attempt to overcome an outer barrier is designed to thwart successful access to electronic data either by triggering an inner barrier or by destroying the data altogether.
One such physical barrier can be a sealable container within which a semiconductor chip containing memory is disposed. By providing conductive surfaces as part of the container, it is possible in such an arrangement to efficiently integrate both data security and data transmission interfacing. Further, by attaching the semiconductor chip to a substrate disposed within the container using solder bumps, and by encapsulating the chip with a conventional epoxy resin, it can be appreciated that the efficacy of many reverse engineering techniques for determining logic states in the memory cells, for example, backside emission microscopy, is severely curtailed.
Another simple, yet highly effective, physical barrier can be a multi-layered and interlaced conductive grid provided as part of the metallization of the semiconductor chip itself. It can be appreciated that providing an interlaced conductive grid, formed with minimum geometries, can deter effective electron microscopy as well as detect microprobing. Based upon detecting such microprobing of the conductive layers, it would be advantageous to provide a trip circuit that would destroy the data stored in the memory either passively by cutting off the internal power supply, or actively by transmitting an erase signal to the memory array.
Furthermore, it would be advantageous to provide a detection/trip circuit as part of the monolithic semiconductor chip, that is capable of detecting a change in any environmental condition associated with an unlawful attempt to gain access. For example, the detection circuit can detect and be tripped by a predetermined magnitude of change, or by reaching a predetermined set-point in electromagnetic radiation, chemical composition, ambient pressure, temperature and the like. In addition, by monitoring a real-time oscillator associated with the semiconductor chip, a data erase signal can also be generated should the unlawful entry result in either a change in the frequency of the real-time oscillator or a temporary stoppage of the real-time oscillator.
Although some of the above-mentioned security enhancements have heretofore been extant for sometime, no prior art system is known to have all of the advantages and novel features of the cost-effective combination solution described, and claimed, hereinbelow.